Victoria Bazir
DigiTimes reports that TSMC plans to raise wafer prices by 3–6% from January 2027, with potentially larger increases for 2nm and 3nm. TSMC declined to comment.
TSMC 2nm vs 3nm
| Specification | TSMC 3nm | TSMC 2nm |
| Architecture | Fin | FETGAA nanosheet |
| Performance | Baseline | Up to ~15% higher |
| Power | Baseline | Up to ~30% lower |
| Density | Baseline | >1.15× |
| Applications | Mobile, HPC, AI | Mobile, HPC, AI |
TSMC says N2 can provide up to 15% higher performance at the same power or 30% lower power at the same speed versus the previous 3nm generation.
N2P extends the platform further. Compared with N3E, TSMC targets roughly 18% higher performance, 36% lower power and 20% higher transistor density.
Why TSMC wafer prices are rising
Supply-chain sources cited by DigiTimes report:
- 8-inch utilization above 100%
- sub-45nm capacity fully loaded
- orders visible through 2030
- 2nm and 3nm demand exceeding supply
AI is driving demand not only for GPUs and ASICs but also for HBM-related components, power chips, controllers, analog ICs, sensors, optics and advanced packaging.
AI demand is putting pressure on both advanced and mature semiconductor nodes.
This matters because an AI accelerator may use 2nm or 3nm, while many supporting power, analog and controller chips remain on older processes.
From 3nm to 2nm
- N3/N3E: FinFET-based 3nm technology.
- N2: GAA nanosheets, up to 15% more performance or 30% lower power versus the previous generation.
- N2P: enhanced 2nm process with further performance, efficiency and density gains.
TSMC's Arizona wafers also reportedly remain more expensive because of higher local manufacturing costs.
The reported 3–6% price increase in 2027 is therefore part of a broader trend: demand for AI hardware is tightening capacity across leading-edge chips, mature nodes and advanced packaging simultaneously.
Victoria Bazir
